Plug-and-Play FPGA-Based Chiplet Connectivity

Talk to our FPGA experts about seamless chiplet integration and connectivity with infinite possibilities. Harness the power of Achronix Speedcore eFPGA licensable fabric and NoC for unparalleled die-to-die interface flexibility and robust protocol support, future-proofing your designs. Achronix chiplet solutions support a wide range of processing nodes, from 16nm to 3nm TSMC. Enable adaptability to evolve requirements and protect your investment in semiconductor designs. 

Fraunhofer IIS/EAS & Achronix jointly presented at the 2024 Chiplet Summit: Developers of high-performance chiplet-based solutions need a way to validate the interface compatibility of their chiplets. A new project has created a demonstration platform suitable for various applications such as radar preprocessing, wireless and optical communications, wireless infrastructure, ADAS, and high-performance test and measurement equipment. The platform employs eFPGAs to provide reconfigurability, allowing rapid changes and offering low latency and high-performance data acceleration. Developers can use it to explore chiplet-to-chiplet interconnects such as Bunch of Wires (BoW) and Universal Chiplet Interconnect Express (UCIe). New versions of the protocols can also be readily incorporated.

Creating a custom FPGA chiplet using eFPGA (embedded Field-Programmable Gate Array) IP allows for the integration of programmable hardware acceleration tailored to specific applications, offering greater flexibility and performance optimization in semiconductor designs. This approach empowers developers to enhance their processors with reconfigurable hardware for tasks like AI, signal processing, and cryptography.

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