Maximize Hardware Assurance with eFPGA IP

Maximize Hardware Assurance with eFPGA IP

In this webinar you will learn how to maximize hardware assurance (HwA) for critical IP in the semiconductor manufacturing process using eFPGA technology. Hardware assurance is of critical importance for manufacturing semiconductors in applications with heightened security requirements. See how eFPGAs can help to reduce the risk of critical IP getting compromised during the entire life cycle of the ASIC including:

  • Obtaining ASIC IP from vendors
  • ASIC design process • ASIC foundry
  • Board design
  • Contract manufacturer
  • PCB storage

By integrating eFPGA IP into an ASIC, critical IP is significantly more secure and exposure to many threats are eliminated. After this webinar, you will understand the challenges in maximizing hardware assurance in the traditional ASIC design process and how adding eFPGAs into your ASIC design will significantly reduce the exposure of critical IP along the ASIC supply chain.

Presented by:

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Raymond Nijssen - Vice President and Chief Technologist

Raymond has over 25 years of experience in the FPGA and EDA industries in various senior technical and management positions. Mr. Nijssen joined Achronix as Chief Software Architect to manage the software development group, define the foundations and algorithms of the software system, and architect key aspects of the company’s FPGA architectures. In his current role, he is responsible for the productization of the company’s current products and R&D of new technologies for future products. Mr. Nijssen received his MSEE degree from Eindhoven University of Technology in The Netherlands, and followed its postgraduate program studying EDA for VLSI. He holds several patents related to place-and-route and asynchronous circuit technologies.